Στοιχεία MARC
000 -LEADER |
fixed length control field |
02924nam a2200289 u 4500 |
001 - CONTROL NUMBER |
control field |
10107117 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
upatras |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20210909093247.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
050111s2003 nyua eng |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
047127447X |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
Ινστιτούτο Τεχνολογίας Υπολογιστών |
Transcribing agency |
Ινστιτούτο Τεχνολογίας Υπολογιστών |
082 14 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.381 5 |
Edition number |
21 |
245 10 - TITLE STATEMENT |
Title |
Digital system clocking : |
Remainder of title |
high performance and low-power aspects / |
Statement of responsibility, etc. |
Vojin G. Oklobdzija ... [et al.]. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
Place of publication, distribution, etc. |
New York ; |
-- |
Hoboken : |
Name of publisher, distributor, etc. |
IEEE ; |
-- |
John Wiley, |
Date of publication, distribution, etc. |
c2003. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xv, 245 σ. : |
Other physical details |
εικ. ; |
Dimensions |
24 εκ. |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc |
Περιλαμβάνει βιβλιογραφικές παραπομπές και ευρετήριο. |
505 1# - FORMATTED CONTENTS NOTE |
Formatted contents note |
Preface |
-- |
Chapter 1 : Introduction |
-- |
1.1 Clocking in Synchronous Systems |
-- |
1.2 System Clock Design |
-- |
1.3 Timing Parameters |
-- |
1.4 Clock Signal Distribution |
-- |
Chapter 2 : Theory of Clocked Storage Elements |
-- |
2.1 Latch-Based Clocked Storage Elements |
-- |
2.2. Flip-Flop |
-- |
Chapter 3 : Timing and Energy Parameters |
-- |
3.1 Timing Parameters |
-- |
3.2 Energy Parameters |
-- |
3.3 Interface with Clock Network and Combinational Logic |
-- |
Chapter 4 : Pipelining and Timing Analysis |
-- |
4.1 Analysis of System that Uses a Flip-Flop |
-- |
4.2 Analysis of a System that Uses a Single Latch |
-- |
4.3 Analysis of a System with a Two - Phase Clock |
-- |
4.4 Analysis of a System with a Sihgle -Phase Clock and Dual-Edge-Triggered Storage Elements |
-- |
Chapter 5 : High-Performance System Issues |
-- |
5.1 Absorbing Clock Uncertainties |
-- |
5.2 Time Borrowing |
-- |
5.3 Time Borrowing and Clock Uncertainty |
-- |
Chapter 6 : Low-Energy System Issues |
-- |
6.1 Low-Swing Circuit Techniques |
-- |
6.2 Clock Gating |
-- |
6.3 Dual -Edge Triggering |
-- |
6.4 Glitch Robust Design |
-- |
Chapter 7 : Simulation Techniques |
-- |
7.1 Simulation Techniques |
-- |
7.2 Environment Setup |
-- |
7.3 Appendix |
-- |
Chapter 8 : State -of-the Art Clocked Storage Elements in CMOS Technology |
-- |
8.1 Master - Slave Latch Examples |
-- |
8.2 Flip-Flop Examples |
-- |
8.3 Clocked Storage Elements with Local Clock Gating |
-- |
8.4 Low-Swing Clock Storage Elements |
-- |
8.5 Dual-Edge-Triggered Clocked Storage Elements |
-- |
8.6 Summary |
-- |
Chapter 9 : Microprocessors Examples |
-- |
9.1 Clocking for Intel Microprocessors |
-- |
9.2 Sun Microsystems Ultrasparc - III Clocking |
-- |
9.3 Alpha Clocking : A Historical Overview |
-- |
9.4 Clocked Storage Elements in IBM Processors |
-- |
References |
-- |
Index |
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Διαχείριση μνήμης (Επιστήμη των υπολογιστών) |
9 (RLIN) |
82617 |
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Ολοκληρωμένα κυκλώματα χαμηλής τάσης |
9 (RLIN) |
139961 |
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name as entry element |
Ηλεκτρονικοί ψηφιακοί υπολογιστές |
9 (RLIN) |
1983 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Oklobdzija, Vojin G |
Relator code |
aut |
9 (RLIN) |
93307 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Stojanovic, Vladimir M |
Relator code |
aut |
9 (RLIN) |
127985 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Markovic, Dejan M |
Relator code |
aut |
9 (RLIN) |
127986 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Nedovic, Nikola M |
Relator code |
aut |
9 (RLIN) |
127987 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
Dewey Decimal Classification |
Koha item type |
Book |