Στοιχεία MARC
| 000 -LEADER |
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| fixed length control field |
02463nam a2200277 u 4500 |
| 001 - CONTROL NUMBER |
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| control field |
10106844 |
| 003 - CONTROL NUMBER IDENTIFIER |
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| control field |
upatras |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
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| control field |
20210825092134.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
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| fixed length control field |
030408s gre |
| 040 ## - CATALOGING SOURCE |
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| Original cataloging agency |
Βιβλιοθήκη ΕΑΙΤΥ |
| Transcribing agency |
Βιβλιοθήκη ΕΑΙΤΥ |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
XX-XxUND |
| Transcribing agency |
Βιβλιοθήκη ΕΑΙΤΥ |
| 082 14 - DEWEY DECIMAL CLASSIFICATION NUMBER |
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| Classification number |
621.381 5 |
| Edition number |
21h |
| 245 10 - TITLE STATEMENT |
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| Title |
Computer - Aided Designs Tools for Digital Systems |
| Remainder of title |
TUTORIAL. A tutorial on design automation tools at the architecture and register - transfer level |
| Statement of responsibility, etc. |
W. M. vanCleemput |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
2nd ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc. |
New York |
| Name of publisher, distributor, etc. |
The Institute of Electrical and Electronic Engineers, Inc. |
| Date of publication, distribution, etc. |
c1979 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
v, 168 p., fig. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
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| Bibliography, etc |
Περιέχει Βιβλιογραφικές Αναφορές |
| 505 1# - FORMATTED CONTENTS NOTE |
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| Formatted contents note |
Preface |
| -- |
Part 1: Introduction |
| -- |
The Role of Design Automation in the Design of Digital Systems |
| -- |
A Structured Design Automation Environment for Digital Systems |
| -- |
Part II : Design Languages |
| -- |
A Survey of Computer Hardware Description Language in the USA |
| -- |
Introducing PMS |
| -- |
An Hierarchical Language for the Structural Description of Digital Systems |
| -- |
SCALD:Structured Computer-Aided Logic Design |
| -- |
An Architectural Research Facility - ISP Descriptions, Simulation, Data Collection |
| -- |
Introducing CDL/ Yaohan Chu |
| -- |
Introducing CDL /D.L. Dietmeyer |
| -- |
Introducing AHPL / Frederick J. Hill |
| -- |
Part III : System Level Description |
| -- |
LOGOS and the Software Engineer |
| -- |
Modeling for Syntesis - The Gap Between Intent and Behavior |
| -- |
State of the Implementation of SARA |
| -- |
Multi-Level Modeling in SARA |
| -- |
The Graph Model of Behavior Simulator |
| -- |
Developing a SARA Building Block - The 8080 |
| -- |
Specialization of SARA for Software Synthesis |
| -- |
Part IV : System Level Simulation |
| -- |
Computer System Simulation : An Introduction |
| -- |
Part V : Register Transfer and Gate Level Simulation |
| -- |
Design Verification at the Register Transfer Language Level |
| -- |
Digital Logic Simulation In a Time - Based, Table - Driven Environment. Part 1. Design Verification |
| -- |
Digital Logic Simulation In a Time-Based, Table-Driven Environment. Part 2. Parallel Fault Simulation |
| 650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Ηλεκτρονικοί υπολογιστές |
| General subdivision |
Μελέτη και διδασκαλία |
| 9 (RLIN) |
121737 |
| 650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
COMPUTER AIDED DESIGN |
| 9 (RLIN) |
24299 |
| 650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
DIGITAL SYSTEMS |
| 9 (RLIN) |
113234 |
| 650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
ΓΑΛΛΟΠΟΥΛΟΣ |
| 9 (RLIN) |
113813 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
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| Personal name |
VANCLEEMPUT, W.M. |
| Relator code |
aut |
| 9 (RLIN) |
127374 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
